![]() ![]() The three serial links use 1.5 Gb/s as input clock signal. 5-bit 7.5 Gb/s and 6-bit 9 Gb/s amplitude-modulated DTS serial links have been designed, simulated and compared to the 6 Gb/s DTS serial link. 4-bit 6 Gb/s DTS serial link has been designed and simulated using 65 nm CMOS mixed signal technology. Applying the PAM to the DTS-transmitted signal increases the total number of the transmitted bits per symbol while maintaining the transmitted signal bandwidth. ![]() An increased number of bits pulse amplitude-modulated differential-time signalling interface for off-chip interconnect is introduced in this article by combining the differential time signalling (DTS) technique with the pulse amplitude-modulation (PAM) approach. ![]()
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